322 lines
17 KiB
C
322 lines
17 KiB
C
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#ifndef UNITY_ATOMIC_FORCE_LOCKFREE_IMPLEMENTATION
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# define UNITY_ATOMIC_FORCE_LOCKFREE_IMPLEMENTATION 1
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#endif
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namespace detail
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{
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#if UNITY_ATOMIC_USE_CLANG_ATOMICS && UNITY_ATOMIC_USE_GCC_ATOMICS
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# error Cannot use both Clang and GCC atomic built-ins
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#elif UNITY_ATOMIC_USE_CLANG_ATOMICS
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# if !__has_feature(c_atomic) && !__has_extension(c_atomic)
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# error "missing atomic built-in functions"
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# endif
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# define INTERNAL_UNITY_ATOMIC_THREAD_FENCE(memorder) __c11_atomic_thread_fence(memorder)
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# define INTERNAL_UNITY_ATOMIC_LOAD(ptr, memorder) __c11_atomic_load(ptr, memorder)
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# define INTERNAL_UNITY_ATOMIC_STORE(ptr, value, memorder) __c11_atomic_store(ptr, value, memorder)
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# define INTERNAL_UNITY_ATOMIC_EXCHANGE(ptr, value, memorder) __c11_atomic_exchange(ptr, value, memorder)
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# define INTERNAL_UNITY_ATOMIC_COMPARE_EXCHANGE_STRONG(ptr, oldval, newval, success, fail) __c11_atomic_compare_exchange_strong(ptr, oldval, newval, success, fail)
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# define INTERNAL_UNITY_ATOMIC_COMPARE_EXCHANGE_WEAK(ptr, oldval, newval, success, fail) __c11_atomic_compare_exchange_weak(ptr, oldval, newval, success, fail)
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# define INTERNAL_UNITY_ATOMIC_FETCH_ADD(ptr, value, memorder) __c11_atomic_fetch_add(ptr, value, memorder)
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# define INTERNAL_UNITY_ATOMIC_FETCH_SUB(ptr, value, memorder) __c11_atomic_fetch_sub(ptr, value, memorder)
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# define INTERNAL_UNITY_ATOMIC_TYPE(type) _Atomic(type)
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# define INTERNAL_UNITY_ATOMIC_IS_LOCK_FREE(type) __c11_atomic_is_lock_free(sizeof(type))
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#elif UNITY_ATOMIC_USE_GCC_ATOMICS
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# if (!PLATFORM_PS4) && ((__GNUC__ < 4) || (__GNUC__ == 4 && __GNUC_MINOR__ < 7))
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# error "__atomic built-in functions not supported on GCC versions older than 4.7"
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# endif
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# if UNITY_ATOMIC_FORCE_LOCKFREE_IMPLEMENTATION
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# if __GCC_ATOMIC_INT_LOCK_FREE + 0 != 2 || __GCC_ATOMIC_LLONG_LOCK_FREE + 0 != 2
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# error "atomic ops are not lock-free for some required data types"
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# endif
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# endif
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# define INTERNAL_UNITY_ATOMIC_THREAD_FENCE(memorder) __atomic_thread_fence(memorder)
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# define INTERNAL_UNITY_ATOMIC_LOAD(ptr, memorder) __atomic_load_n(ptr, memorder)
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# define INTERNAL_UNITY_ATOMIC_STORE(ptr, value, memorder) __atomic_store_n(ptr, value, memorder)
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# define INTERNAL_UNITY_ATOMIC_EXCHANGE(ptr, value, memorder) __atomic_exchange_n(ptr, value, memorder)
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# define INTERNAL_UNITY_ATOMIC_COMPARE_EXCHANGE_STRONG(ptr, oldval, newval, success, fail) __atomic_compare_exchange_n(ptr, oldval, newval, false, success, fail)
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# define INTERNAL_UNITY_ATOMIC_COMPARE_EXCHANGE_WEAK(ptr, oldval, newval, success, fail) __atomic_compare_exchange_n(ptr, oldval, newval, true, success, fail)
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# define INTERNAL_UNITY_ATOMIC_FETCH_ADD(ptr, value, memorder) __atomic_fetch_add(ptr, value, memorder)
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# define INTERNAL_UNITY_ATOMIC_FETCH_SUB(ptr, value, memorder) __atomic_fetch_sub(ptr, value, memorder)
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# define INTERNAL_UNITY_ATOMIC_TYPE(type) type
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# if __GNUC__ >= 5
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// GCC pre-5 did not allow __atomic_always_lock_free in static expressions such as CompileTimeAssert
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// https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62024
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# define INTERNAL_UNITY_ATOMIC_IS_LOCK_FREE(type) __atomic_always_lock_free(sizeof(type), 0)
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# else
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# define INTERNAL_UNITY_ATOMIC_IS_LOCK_FREE(type) true
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# endif
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#else
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# error One of UNITY_ATOMIC_USE_CLANG_ATOMICS or UNITY_ATOMIC_USE_GCC_ATOMICS must be defined to 1
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#endif
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inline int MemOrder(memory_order_relaxed_t) { return __ATOMIC_RELAXED; }
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inline int MemOrder(memory_order_release_t) { return __ATOMIC_RELEASE; }
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inline int MemOrder(memory_order_acquire_t) { return __ATOMIC_ACQUIRE; }
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inline int MemOrder(memory_order_acq_rel_t) { return __ATOMIC_ACQ_REL; }
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inline int MemOrder(memory_order_seq_cst_t) { return __ATOMIC_SEQ_CST; }
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void MemOrder(...); // generate compile error on unsupported mem order types
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#define INTERNAL_UNITY_ATOMIC_TYPEDEF(nonatomic, atomic) \
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typedef INTERNAL_UNITY_ATOMIC_TYPE(nonatomic) atomic; \
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CompileTimeAssert(!UNITY_ATOMIC_FORCE_LOCKFREE_IMPLEMENTATION || INTERNAL_UNITY_ATOMIC_IS_LOCK_FREE(atomic), #atomic " is not lock-free on this platform")
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INTERNAL_UNITY_ATOMIC_TYPEDEF(non_atomic_word, native_atomic_word);
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INTERNAL_UNITY_ATOMIC_TYPEDEF(non_atomic_word2, native_atomic_word2);
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INTERNAL_UNITY_ATOMIC_TYPEDEF(int, native_atomic_int);
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#if UNITY_ATOMIC_FORCE_LOCKFREE_IMPLEMENTATION
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CompileTimeAssert(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4 + 0, "requires 32bit CAS");
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CompileTimeAssert(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8 + 0, "requires 64bit CAS");
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// we will have special implementation for arm64
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#if __SIZEOF_POINTER__ == 8 && !defined(__arm64__)
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CompileTimeAssert(__GCC_HAVE_SYNC_COMPARE_AND_SWAP_16 + 0, "requires 128bit CAS");
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#endif
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#endif
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#undef INTERNAL_UNITY_ATOMIC_TYPEDEF
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inline native_atomic_word* AtomicPtr(atomic_word* p) { return reinterpret_cast<native_atomic_word*>(p); }
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inline volatile native_atomic_word* AtomicPtr(volatile atomic_word* p) { return reinterpret_cast<volatile native_atomic_word*>(p); }
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inline native_atomic_word2* AtomicPtr(atomic_word2* p) { return reinterpret_cast<native_atomic_word2*>(&p->v); }
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inline volatile native_atomic_word2* AtomicPtr(volatile atomic_word2* p) { return reinterpret_cast<volatile native_atomic_word2*>(&p->v); }
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inline non_atomic_word* NonAtomicPtr(atomic_word* v) { return v; }
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// same as above: inline non_atomic_word* NonAtomicPtr(non_atomic_word* v) { return v; }
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inline non_atomic_word2* NonAtomicPtr(atomic_word2* v) { return &v->v; }
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inline non_atomic_word2* NonAtomicPtr(non_atomic_word2* v) { return v; }
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inline non_atomic_word NonAtomicValue(atomic_word v) { return v; }
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// same as above: inline non_atomic_word NonAtomicValue(non_atomic_word v) { return v; }
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inline non_atomic_word2 NonAtomicValue(atomic_word2 v) { return v.v; }
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inline non_atomic_word2 NonAtomicValue(non_atomic_word2 v) { return v; }
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inline atomic_word UnityAtomicValue(non_atomic_word v) { return v; }
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inline atomic_word2 UnityAtomicValue(non_atomic_word2 v) { atomic_word2 r; r.v = v; return r; }
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#ifdef UNITY_ATOMIC_INT_OVERLOAD
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inline native_atomic_int* AtomicPtr(int* p) { return reinterpret_cast<native_atomic_int*>(p); }
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inline volatile native_atomic_int* AtomicPtr(volatile int* p) { return reinterpret_cast<volatile native_atomic_int*>(p); }
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inline int* NonAtomicPtr(int* v) { return v; }
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inline int NonAtomicValue(int v) { return v; }
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inline int UnityAtomicValue(int v) { return v; }
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#endif
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template<typename T> struct Identity { typedef T type; };
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} // namespace detail
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template<typename MemOrder>
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static inline void atomic_thread_fence(MemOrder memOrder)
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{
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INTERNAL_UNITY_ATOMIC_THREAD_FENCE(detail::MemOrder(memOrder));
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}
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template<typename T, typename MemOrder>
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static inline T atomic_load_explicit(const volatile T* p, MemOrder memOrder)
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{
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return detail::UnityAtomicValue(INTERNAL_UNITY_ATOMIC_LOAD(detail::AtomicPtr(const_cast<T*>(p)), detail::MemOrder(memOrder)));
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}
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template<typename T, typename MemOrder>
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static inline void atomic_store_explicit(volatile T* p, typename detail::Identity<T>::type v, MemOrder memOrder)
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{
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INTERNAL_UNITY_ATOMIC_STORE(detail::AtomicPtr(p), detail::NonAtomicValue(v), detail::MemOrder(memOrder));
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}
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template<typename T, typename MemOrder>
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static inline T atomic_exchange_explicit(volatile T* p, typename detail::Identity<T>::type v, MemOrder memOrder)
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{
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return detail::UnityAtomicValue(INTERNAL_UNITY_ATOMIC_EXCHANGE(detail::AtomicPtr(p), detail::NonAtomicValue(v), detail::MemOrder(memOrder)));
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}
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template<typename T, typename MemOrderSuccess, typename MemOrderFail>
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static inline bool atomic_compare_exchange_weak_explicit(volatile T* p, T* oldval, typename detail::Identity<T>::type newval,
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MemOrderSuccess memOrderSuccess, MemOrderFail memOrderFail)
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{
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return INTERNAL_UNITY_ATOMIC_COMPARE_EXCHANGE_WEAK(detail::AtomicPtr(p), detail::NonAtomicPtr(oldval), detail::NonAtomicValue(newval),
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detail::MemOrder(memOrderSuccess), detail::MemOrder(memOrderFail));
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}
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template<typename T, typename MemOrderSuccess, typename MemOrderFail>
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static inline bool atomic_compare_exchange_strong_explicit(volatile T* p, T* oldval, typename detail::Identity<T>::type newval,
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MemOrderSuccess memOrderSuccess, MemOrderFail memOrderFail)
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{
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return INTERNAL_UNITY_ATOMIC_COMPARE_EXCHANGE_STRONG(detail::AtomicPtr(p), detail::NonAtomicPtr(oldval), detail::NonAtomicValue(newval),
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detail::MemOrder(memOrderSuccess), detail::MemOrder(memOrderFail));
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}
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template<typename T, typename MemOrder>
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static inline T atomic_fetch_add_explicit(volatile T* p, typename detail::Identity<T>::type v, MemOrder memOrder)
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{
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return detail::UnityAtomicValue(INTERNAL_UNITY_ATOMIC_FETCH_ADD(detail::AtomicPtr(p), detail::NonAtomicValue(v), detail::MemOrder(memOrder)));
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}
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template<typename T, typename MemOrder>
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static inline T atomic_fetch_sub_explicit(volatile T* p, typename detail::Identity<T>::type v, MemOrder memOrder)
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{
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return detail::UnityAtomicValue(INTERNAL_UNITY_ATOMIC_FETCH_SUB(detail::AtomicPtr(p), detail::NonAtomicValue(v), detail::MemOrder(memOrder)));
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}
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/*
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* extensions
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*/
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static inline void atomic_retain(volatile int* p)
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{
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atomic_fetch_add_explicit(p, 1, ::memory_order_relaxed);
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}
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static inline bool atomic_release(volatile int* p)
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{
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// Both paths here should be correct on any platform
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// On architectures where read-modify-write with memory_order_acq_rel is more expensive than memory_order_release
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// the idea is to use a global memory_order_acquire fence instead, but only when the reference count drops to 0.
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// Only then the acquire/release synchronization is needed to make sure everything prior to atomic_release happens before running a d'tor.
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#if defined(__arm__) || defined(__arm64__)
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bool res = atomic_fetch_sub_explicit(p, 1, ::memory_order_release) == 1;
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if (res)
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{
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atomic_thread_fence(::memory_order_acquire);
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}
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return res;
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#else
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return atomic_fetch_sub_explicit(p, 1, ::memory_order_acq_rel) == 1;
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#endif
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}
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#undef INTERNAL_UNITY_ATOMIC_THREAD_FENCE
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#undef INTERNAL_UNITY_ATOMIC_LOAD
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#undef INTERNAL_UNITY_ATOMIC_STORE
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#undef INTERNAL_UNITY_ATOMIC_EXCHANGE
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#undef INTERNAL_UNITY_ATOMIC_COMPARE_EXCHANGE_STRONG
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#undef INTERNAL_UNITY_ATOMIC_COMPARE_EXCHANGE_WEAK
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#undef INTERNAL_UNITY_ATOMIC_FETCH_ADD
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#undef INTERNAL_UNITY_ATOMIC_FETCH_SUB
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#undef INTERNAL_UNITY_ATOMIC_TYPE
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#undef INTERNAL_UNITY_ATOMIC_IS_LOCK_FREE
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// the only way to get atomic 128-bit memory accesses on ARM64 is to use ld(r|a)ex/st(r|a)ex with a loop
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// going forward we want to get rid of most of it, by undefing ATOMIC_HAS_DCAS and providing custom impl of AtomicQueue and friends
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#if __SIZEOF_POINTER__ == 8 && (defined(__arm64__) || defined(__aarch64__))
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static inline atomic_word2 atomic_load_explicit(const volatile atomic_word2* p, memory_order_relaxed_t)
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{
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non_atomic_word2 v; volatile non_atomic_word2* pv = (volatile non_atomic_word2*)&p->v;
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do
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{
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v = __builtin_arm_ldrex(pv);
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}
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while (__builtin_arm_strex(v, pv));
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return (atomic_word2) {.v = v};
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}
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static inline atomic_word2 atomic_load_explicit(const volatile atomic_word2* p, memory_order_acquire_t)
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{
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non_atomic_word2 v; volatile non_atomic_word2* pv = (volatile non_atomic_word2*)&p->v;
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do
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{
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v = __builtin_arm_ldaex(pv);
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}
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while (__builtin_arm_strex(v, pv));
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return (atomic_word2) {.v = v};
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}
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static inline void atomic_store_explicit(volatile atomic_word2* p, atomic_word2 v, memory_order_relaxed_t)
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{
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non_atomic_word2 tmp; volatile non_atomic_word2* pv = &p->v;
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do
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{
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tmp = __builtin_arm_ldrex(pv);
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}
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while (__builtin_arm_strex(v.v, pv));
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}
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static inline void atomic_store_explicit(volatile atomic_word2* p, atomic_word2 v, memory_order_release_t)
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{
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non_atomic_word2 tmp; volatile non_atomic_word2* pv = &p->v;
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do
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{
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tmp = __builtin_arm_ldrex(pv);
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}
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while (__builtin_arm_stlex(v.v, pv));
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}
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static inline atomic_word2 atomic_exchange_explicit(volatile atomic_word2* p, atomic_word2 val, memory_order_acq_rel_t)
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{
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non_atomic_word2 ret; volatile non_atomic_word2* pv = &p->v;
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do
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{
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ret = __builtin_arm_ldaex(pv);
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}
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while (__builtin_arm_stlex(val.v, pv));
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return (atomic_word2) {.v = ret};
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}
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// the story behind this: in arm64 asm impl header we had overloads for memory_order_acquire_t, memory_order_release_t and int
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// int being taken in all other cases - it was memory_order_acq_rel_t impl below
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// now as we moved them here, int overload "looses" to template above, so it was never taken (and that is why we needed explicit overload)
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// for seq_cst being same as acq_rel:
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// first of all - it was the case for asm impl (and it worked for quite some time)
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// second: it seems apple itself uses ldaxr/stlxr in that case (without extra dmb)
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// this is both the case with some apple open-source code and asm generated for OSAtomicAdd32Barrier and friends
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#define COMPARE_EXCHANGE_IMPL(LOAD_FUNC, STORE_FUNC) \
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const non_atomic_word2 cmp = oldval->v; volatile non_atomic_word2* pv = &p->v; bool success = false; \
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do \
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{ \
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non_atomic_word2 cur = oldval->v = LOAD_FUNC(pv); \
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success = (cur == cmp); \
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if (!success) \
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{ \
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__builtin_arm_clrex(); \
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break; \
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} \
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} \
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while (STORE_FUNC(newval.v, pv)); \
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return success; \
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static inline bool atomic_compare_exchange_strong_explicit(volatile atomic_word2* p, atomic_word2* oldval, atomic_word2 newval, memory_order_acquire_t, memory_order_relaxed_t)
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{
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COMPARE_EXCHANGE_IMPL(__builtin_arm_ldaex, __builtin_arm_strex);
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}
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static inline bool atomic_compare_exchange_strong_explicit(volatile atomic_word2* p, atomic_word2* oldval, atomic_word2 newval, memory_order_release_t, memory_order_relaxed_t)
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{
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COMPARE_EXCHANGE_IMPL(__builtin_arm_ldrex, __builtin_arm_stlex);
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}
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static inline bool atomic_compare_exchange_strong_explicit(volatile atomic_word2* p, atomic_word2* oldval, atomic_word2 newval, memory_order_acq_rel_t, memory_order_relaxed_t)
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{
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COMPARE_EXCHANGE_IMPL(__builtin_arm_ldaex, __builtin_arm_stlex);
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}
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static inline bool atomic_compare_exchange_strong_explicit(volatile atomic_word2* p, atomic_word2* oldval, atomic_word2 newval, memory_order_seq_cst_t, memory_order_relaxed_t)
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{
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COMPARE_EXCHANGE_IMPL(__builtin_arm_ldaex, __builtin_arm_stlex);
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}
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#undef COMPARE_EXCHANGE_IMPL
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#endif // __SIZEOF_POINTER__ == 8 && defined(__arm64__)
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// when implementing atomic operations in arm-specific way we need to take care of armv7/armv8 differences
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// armv8: has ldaex/stlex that add acquire/release semantics
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// armv7: we need to insert fence ourselves
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#if defined(__arm__) || defined(__arm64__) || defined(__aarch64__)
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#if defined(__arm64__) || defined(__aarch64__)
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#define UNITY_ATOMIC_ARMV7_DMB_ISH
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#define UNITY_ATOMIC_ARMV8_LDAEX __builtin_arm_ldaex
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#define UNITY_ATOMIC_ARMV8_STLEX __builtin_arm_stlex
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#else
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#define UNITY_ATOMIC_ARMV7_DMB_ISH __builtin_arm_dmb(11);
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#define UNITY_ATOMIC_ARMV8_LDAEX __builtin_arm_ldrex
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#define UNITY_ATOMIC_ARMV8_STLEX __builtin_arm_strex
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#endif
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#endif
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